PCB fabrication: how a bare board is made, layer by layer

Guide · PCB Fabrication PCB fabrication: how a bare board is made, layer by layer Before a single component is placed, the printed circuit board itself has to be manufactured — copper laminated, imaged, etched, drilled, plated, masked and finished to tolerances measured in microns. This is the bare-board process end to end: the materials, the stack-up, the finishes, the specs and the tests that decide whether your design comes back clean or comes back as scrap. What PCB fabrication actually is PCB fabrication is the manufacture of the bare board — the unpopulated laminate with its copper traces, pads, vias and finish — before any component is attached. It is a subtractive, additive and photographic process at the same time: copper is bonded to a dielectric, a photoresist image defines the circuit, etchant removes the copper that is not circuit, and plating rebuilds the copper that makes the holes conductive. The output is a rigid or flexible panel that electrical test has confirmed matches the Gerber data. Fabrication is a separate discipline from assembly. The fabricator owns the stack-up, the copper weights, the drill map, the mask and the finish; the assembler owns solder paste, placement, reflow and test. Confusing the two is the fastest way to order the wrong thing — and to send a board to a shop that only does one of them. The governing standard is the IPC family; work from https://www.ipc.org/ipc-standards — IPC-6012 for rigid boards, IPC-4101 for base materials, IPC-A-600 for acceptance. Those documents set the minimums every number in this guide sits on top of. The fabrication process, step by step Every bare board, from a two-layer LED driver to a sixteen-layer HDI controller, runs through the same sequence. The differences are in how many times each step repeats and how tight the tolerances are set. The steps below follow a standard multilayer board, because that is where the process is most instructive. Laminate and core. The board starts as laminate: woven glass cloth impregnated with resin, cured and clad with copper foil on one or both sides to form a core. Multilayer boards stack cores and prepreg — uncured resin sheets — in a press, where heat and pressure flow the resin and bond everything into a solid panel. The resin system, the glass style and the copper weight are chosen here, and they fix the electrical and thermal behavior for the life of the board. Imaging. A photoresist film is laminated over the copper, and a photoplotter exposes the circuit image through the film using the Gerber data. Development washes away the unexposed resist, leaving hardened resist only where the circuit will remain. Registration here — aligning the image to the drilled holes and the inner layers — is what keeps every layer on top of every other layer. Etching. The panel goes through an etchant, typically alkaline or cupric chloride, that dissolves the copper not protected by resist. What remains is the circuit pattern. Etching is subtractive, so the trace edges undercut slightly as the etch bites sideways under the resist — the reason trace-and-space minimums exist and the reason heavier copper costs density. Drilling. Mechanical drills cut the holes for vias and through-hole components, down to roughly 0.15 mm, at high spindle speed. Smaller holes, or holes in an HDI stack, use laser drilling. The hole wall has to be clean and the drill-to-copper registration tight, because every hole becomes a plated connection. Plating. The panel is electroless-plated to deposit a thin conductive seed on the hole walls, then electroplated to build copper to the target thickness — typically 20–25 µm in the barrel. This is what turns a drilled hole into a via that carries current. Plating also builds up the surface traces to their final copper weight. Solder mask. A liquid photoimageable mask is coated, imaged and cured to leave the pads, vias and test points exposed and everything else covered. The mask is both an insulator and a solder dam; its registration and the dam width between fine-pitch pads are what keep solder from bridging. Silkscreen. Ink is printed on top of the mask for reference designators, polarity marks, logos and the board's part number. Silkscreen is cosmetic but functional — a wrong or missing polarity mark misloads a diode on the line. Surface finish. The exposed copper is coated with a finish — HASL, ENIG, OSP, immersion silver or tin — to keep it solderable and protect it from oxidation in storage. This is the last chemical step and the one that most directly sets shelf life and solderability. Between and after these steps sit the controls that separate a good shop from a cheap one: lamination cycle time and pressure, etch compensation for line width, plating uniformity across the panel, mask alignment, and final electrical test. None of them appear in a quote, and all of them appear in the boards. Layer stack: from 2 to 16 layers The layer count is the first decision in the design, because it fixes the signal, power and return-path architecture before a single trace is routed. Each added pair of layers buys a solid reference plane and routing headroom — and adds lamination steps, cost and lead time. 2 layers. Signal on both sides, no dedicated plane. Cheapest and fastest, and perfectly adequate for slow, sparse, low-power boards — simple controls, LED drivers, breakout boards. Return paths are compromised, so keep switching currents low and grounds stitched. 4 layers. Signal, ground, power, signal — the workhorse of commercial electronics. One solid ground plane gives every signal a continuous return, cuts EMI and roughly halves loop area for a modest cost step. This is the default for anything with a switching supply or a microcontroller at speed. 6–8 layers. Adds dedicated planes and extra routing layers for dense digital boards, RF sections and mixed-signal designs that need analog and digital returns separated. 10–16 layers. High-speed networking, dense BGA fan-out, HDI with microvias and buried capacitance where routing simply cannot close on fewer layers. Cost and lead time climb steeply, and blind or buried vias multiply the lamination passes. The stack-up is a contract, not a suggestion. Once you fix layer count, copper weight, dielectric thickness and prepreg order, controlled impedance, EMC and thermal behavior all fall out of that choice — and none of it can be retuned after the board is pressed. Put the full stack-up in the fab drawing and send it with the Gerbers. Materials: FR-4, high-frequency, aluminum, flex The laminate is the board's substrate, and the right one is dictated by the signal, the heat and the mechanical environment — not by habit. "FR-4" is a flame-retardant class, not a single material; two FR-4s from different resin systems can differ in dielectric constant by enough to shift your impedance. MaterialTypical useWhat it buys you FR-4General electronics, 2–16 layersLow cost, proven process, wide availability High-frequency (Rogers, PTFE)RF, microwave, high-speed digitalLow loss, stable Dk across frequency and temperature Aluminum (metal-core)LED lighting, power, thermal loadsDirect heat spreading into a metal base Flex / rigid-flex (polyimide)Wearables, tight enclosures, dynamic flexBends, folds, survives repeated flex cycles FR-4. The default for nearly everything. Choose the specific resin system for the job — a standard Tg 130–140 °C material for commercial boards, a high-Tg or halogen-free grade for lead-free reflow and tighter reliability. The datasheet, not the label, is the spec. High-frequency laminates. Rogers and PTFE-based materials hold a stable dielectric constant and low loss tangent where FR-4 drifts and dissipates — antenna feeds, radar, mmWave and multi-gigabit serial links. They cost several times FR-4 and process differently, so specify them only where the electrical performance is actually required. Aluminum. A metal-core board bonds the circuit to an aluminum base through a thin dielectric, pulling heat out of LEDs and power parts into the metal. The metal also acts as a heatsink and a stiffener. Thermal conductivity of the dielectric is the number that matters. Flex and rigid-flex. Polyimide substrates bend and fold, letting the board fit a curved enclosure or survive a hinge. Rigid-flex combines rigid FR-4 sections with flex tails in one board, eliminating connectors and their failure points — at a higher cost and a longer lead time. Surface finishes: HASL, ENIG, OSP, immersion silver and tin The finish coats the exposed copper so it stays solderable and flat for the assembler. It sets coplanarity, shelf life and cost in one choice, and it should be picked for the parts on the board, not for price alone. FinishFlatnessShelf lifeBest for HASL (hot-air solder leveling)UnevenLongCoarse pitch, cost-sensitive boards ENIG (electroless nickel immersion gold)Dead flatLongBGA, fine-pitch QFN, boards in stock OSP (organic solderability preservative)FlatShort (months)Fast-turn, single-pass, high volume Immersion silverFlatModerateRF, high-frequency, aluminum boards Immersion tinFlatModeratePress-fit and niche storage windows HASL. The cheapest and most solderable finish, but the surface is uneven and the pads domed. Fine for coarse pitch; the wrong choice for BGA and fine-pitch QFN, where coplanarity decides the joint. Lead-free HASL runs hotter and leaves a rougher surface than tin-lead. ENIG. A dead-flat, long-shelf-life surface that removes coplanarity from the defect list. It is the standard for BGA, fine-pitch parts and boards that sit in inventory. The cost is higher, and a badly controlled nickel bath risks "black pad," so the shop's plating control matters as much as the finish name. OSP. A thin organic film that is cheap and flat but has a short shelf life — months in sealed storage, less after reflow — and tolerates few rework passes. Best for high-volume, fast-turn, single-pass builds where the board moves from fab to line in days. Immersion silver. Flat and solderable with good high-frequency performance, so it suits RF boards and aluminum substrates. It tarnishes if mishandled, so sealed storage and clean handling matter. Immersion tin. Flat and reworkable, but tin whiskers and a moderate shelf life make it a niche choice for press-fit connectors and specific storage windows. Handle with care and assemble promptly. Specifications that decide yield and cost The numbers in the fab drawing are where a board is won or lost. Set them tighter than the process needs and you buy scrap, longer quotes and a higher price; set them too loose and you give away density for nothing. The four that matter most are trace and space, hole size, aspect ratio and controlled impedance. Trace and space. On 1 oz copper, 0.15 mm (6 mil) is a comfortable production floor on nearly any line, and 0.1 mm (4 mil) is routine on good equipment. Below that you are paying for tighter registration and thinner copper. Heavier copper raises the minimum because etching undercuts wider traces. Hole size. Mechanical drilling bottoms out around 0.15 mm; smaller holes need laser drilling and an HDI process, which adds cost. Standardize on a few drill sizes to avoid constant tool changes, and give through-hole parts holes sized to their leads plus plating. Aspect ratio. The ratio of board thickness to drill diameter. Keep mechanical drilling under 8:1 — a 1.6 mm board wants 0.2 mm holes or larger. Higher ratios leave the plating uneven in the barrel and risk cracked or starved vias. Controlled impedance. 50 Ω single-ended and 90–100 Ω differential traces only work if the stack-up is locked first; trace width, spacing and the reference plane all fall out of it. Send the fab the target impedance with the stack-up, and ask for an impedance coupon on the panel so the value is measured, not assumed. Beyond these, copper weight, mask dam width and the annular ring around each hole all carry the same rule: they are set in the drawing, verified in the boards, and expensive to fix after lamination. A good fab quotes against your actual numbers and tells you where they can be relaxed. Bare-board testing: AOI, flying probe, electrical test A bare board that leaves the fab shorted or open becomes an expensive problem at assembly, so fabrication ends with inspection and test before the panel ships. Three methods carry the load, and they answer different questions. AOI (automated optical inspection). Cameras scan the finished board and compare it against the Gerber image, catching shorts, opens, mask defects and missing or bridged pads at speed. AOI sees what is visible on the surface; it cannot see inside a blind via or under a mask-covered region. Flying probe test. Movable probes land on each net and verify continuity and isolation without a fixture. It is fast to set up, needs no tooling and suits prototypes and low-to-mid volume, but it runs slower per board than a fixed fixture. It is the default electrical check for short runs. Electrical test (bed-of-nails). A fixture contacts every net at once and verifies the full netlist in seconds per board. The fixture costs money and locks the layout, so it pays off on stable, higher-volume products. For high-reliability boards, 100% netlist test is a requirement, not an option. The right test is a decision, not an assumption. Specify it in the order: flying probe for prototypes, electrical test when the volume justifies the fixture, and AOI as a process control on every run. Ask for the test report with the shipment — a board that was tested ships with proof it passed. DFM for bare boards Design for manufacturability on the fabrication side asks one question: can this board be made at target yield on the chosen process? It lives in the stack-up, the copper weights, the trace and space, the drill sizes and the finish — every number in the fab drawing. The full assembly-side ruleset is a separate topic, but the fabrication minimums are worth repeating here. Lock the stack-up first. Layer count, copper weight, dielectric and prepreg order before routing, because impedance and EMC fall out of it. Stay at or above the safe floor. 0.15 mm trace and space on 1 oz, 0.2 mm holes on a 1.6 mm board, 8:1 aspect ratio — relax where density does not demand tighter. Keep copper balanced. Even copper across the panel stops bow and twist during lamination and reflow, which would otherwise ruin stencil registration. Document everything. Stack-up, copper weights, impedance targets and test requirements in the fab drawing, not in a chat message. A board that passes DRC in the CAD tool can still fail on the line. A fabrication partner that reviews your Gerbers against a real process and flags the issues ranked by cost is worth more than the quote it returns. PCB fabrication versus PCB assembly The two terms get swapped constantly, and the distinction is the difference between two suppliers and one phone call. Fabrication makes the bare board; assembly populates it. Fabrication. Laminate, imaging, etch, drill, plating, mask, silkscreen and finish — the bare board itself, tested against the netlist. The deliverable is a panel of unpopulated boards. Assembly (PCBA). Solder paste, component placement, reflow or wave soldering, and test — the populated board ready to power on. The deliverable is a working assembly, not a bare substrate. They share a boundary: the finish is applied by the fabricator and consumed by the assembler, and the fab drawing is read by both. That hand-off is where problems hide — a finish chosen without the assembler in mind, a stack-up the assembler's reflow profile cannot tolerate, a panel the assembler's line cannot convey. The cleanest way to close the gap is to give one partner both sides, so the board and the assembly are designed against the same process. The Nex-G anchor: fabrication through vetted partners, integrated with SMT Nex-G is an EMS, not a bare-board fabricator — and that is the point of the model. Fabrication runs through a network of vetted partner fabs, and the boards drop straight into Nex-G's own SMT lines, so the fab drawing, the finish and the panel are all chosen for the assembly they will feed. One order, one accountable partner, no gap between the bare board and the populated one. Facility. 6,800 m² in Dongguan Hengli, 100+ staff, operating since 2006, with EMS and CNC machining under one roof. EMS scope. PCBA, SMT, box build and test across the full EVT → DVT → PVT path, with no minimum order — the MOQ is one. Certifications. ISO 9001, IATF 16949 (no design work; clause 8.3 excluded) and ISO 14001, with a URS audit current to 2027. Lead times. 3 days for prototypes, 7 days for small runs, 30 days for mass production. Fabrication. Bare boards sourced from vetted partner fabs and integrated with Nex-G's SMT assembly, so the stack-up, finish and panel are specified for the line that builds them. Send the Gerbers, the BOM and the fab drawing. The quote comes back with fabrication sourced, the board and assembly matched to one process, and no minimum order. Frequently asked questions What is the difference between PCB fabrication and PCB assembly?Fabrication makes the bare board — laminate, imaging, etch, drill, plating, mask, silkscreen and finish. Assembly populates it with components and solder. Fabrication delivers an unpopulated panel; assembly delivers a working PCBA. Which surface finish should I choose?ENIG for BGA, fine-pitch parts and boards that sit in stock; OSP for cheap, fast, single-pass builds; HASL for coarse-pitch, cost-sensitive boards. Match the finish to the parts and the shelf life you need, not to the lowest price. How many layers do I need?Two for slow, sparse, low-power boards; four for anything with a switching supply or a fast microcontroller, because a solid ground plane cleans up the return path. Six to sixteen for dense digital, RF and HDI where routing will not close on fewer layers. What is controlled impedance, and do I need it?Controlled impedance holds a trace at a target value — typically 50 Ω single-ended or 90–100 Ω differential — by locking the stack-up first. You need it for high-speed serial links, RF and any interface with an impedance spec in its datasheet. Does Nex-G fabricate boards in-house?Fabrication runs through vetted partner fabs, then integrates with Nex-G's own SMT lines. The fab drawing, finish and panel are specified for the assembly they feed, so one order covers both the bare board and the populated PCBA. What is the minimum order quantity?One. Nex-G runs a no-MOQ model, so prototypes and low-volume production use the same process and the same quality checks as mass production — no separate prototype-shop hand-off. What are the lead times?3 days for prototypes, 7 days for small runs, 30 days for mass production. These are planning brackets confirmed per quote, and fabrication is sourced to match the assembly schedule. What files do you need to quote a board?Gerbers, a BOM with full manufacturer part numbers, the pick-and-place file and the fab drawing with the stack-up and impedance targets. With those, the quote covers fabrication and assembly as one job. Source your bare boards and assembly togetherSend the Gerbers, BOM and fab drawing — we quote fabrication through vetted partners, integrated with our SMT lines, no minimum order.Request a quote Related articlesPCB Design for ManufacturingDFM for ElectronicsPCB Assembly in China: How to Vet an EMS Partner